Bsc Csit Nepal

2081

Digital Logic

Full Marks: 60
Pass Marks: 24
Time: 3 Hours

Candidates are required to give their answers in their own words as far as practicable. The figures in the margin indicate full marks.

SECTION A

Answer any TWO question.

  1. Differentiate between synchronous and asynchronous counter. Design a 3-bit synchronous binary counter using T Flip Flop. Draw its timing diagram.

  2. Explain De-Morgan’s Law. Simplify the Boolean function F(P,Q,R,S) =П(0,1,4,5,11,14,15) and d(P,Q,R,S) =Σ(2,3,7,8,9,13) using K-Map in both SOP and POS form.

  3. Explain design procedure of combinatorial circuits. Design a combinatorial circuit with three inputs x, y, and z, and three outputs A, B, and C. When the binary input is 0, 1, 2 or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is one less than the input.

SECTION B

Answer any EIGHT question.

  1. Given A=46 and B=35 represent them in binary and perform A-B using 1’s complement method.

  2. What is Multiplexer. Design 8 to 1 Multiplexer with low level Multiplexers.

  3. Write about D flip flop with necessary circuit, block diagram, characteristic table and equation.

  4. Simplify F(A, B, C, D) = Σ(1,3,4,6,9,11,12,14) and realize the equation using NOR gates only.

  5. Mention different types of shift registers. Explain SIPO with timing diagram.

  6. What is decoder? Describe the 3 to 8 line decoder circuit.

  7. Explain state diagram, state table, state reduction and state assignment with suitable example.

  8. Design a 2 bit asynchronous binary counter using T flip flop. Draw its timing diagram.

  9. Write short notes on:

    a. Encoder
    b. Error detection codes